CR-5000

PCB Design Tip - How to achieve proper placement of passive devices used for Enet signal termination

It’s no secret that placing passive devices in the proper location, whether it is nearer to the source/driver or the receiver/load pins, makes the difference between poor signal integrity and optimal signal integrity. Often this can be impacted by a breakdown in communications between circuit designers and PCB designers. Typically, the circuit designer has the [...]

Highlights of the 20th FED Conference: Design Rule Violations and PCI Express Design

Last week I was over in the beautiful city of Dresden, Germany; involved in Zuken’s participation at the FED conference – arguably the most significant PCB event in Germany during the year. Apart from our annual conferences in Ulm and Hannover of course Masoud Raeisi and I were very busy manning our own Zuken booth, supporting [...]

CR-5000 R14 - The thrill of a new release...

As a former PCB designer I always looked forward to the next release of the software that I was designing with. Like a kid unwrapping a gift, I would open up the What’s New HTML file and read through all the amazing new goodies designed to make my job that much easier. To this day, as an AE for Zuken, I still have that childlike spirit when I get my first glimpse of what’s new in CR-5000 and this year was no exception when I checked out Revision 14…

Light bulb moments: discovering new uses for Board Modeler with MCAD design

Once in while you come across a feature or application that you find a new use for when you least expect it. Recently, I was working on a project with an electronic design group and we decided to start the 3D modeling of the complete assembly to start some joint analysis with the mechanical engineering [...]

Why simulate PCBs at all? On- and off-piste gigabit signaling, simulation and modeling

This may seem a strange question for someone who’s made their living out of signal integrity for so long, but things have changed. There was a period in the 80s and 90s that I call the SI Deficit: the period when signal integrity issues took engineers by surprise and my specialty was even called “Black Magic”. The design landscape has changed radically since then – the main reason for this being standardization…

Improve PCB Quality and Cost with Concurrent Power Integrity Analysis - Common mode voltage map across PCB

I recently gave a presentation on Power Integrity analysis at PCB West. The presentation, available below, looks at the increasing challenges with power distribution systems on modern high-speed PCBs and considers: IC input impedance behavior, resonance behavior of power distribution systems (PDS), management of decoupling capacitors and EDA methodology for concurrent power integrity simulation throughout PCB design process.