signal integrity

PCB Design Tip - How to achieve proper placement of passive devices used for Enet signal termination

It’s no secret that placing passive devices in the proper location, whether it is nearer to the source/driver or the receiver/load pins, makes the difference between poor signal integrity and optimal signal integrity. Often this can be impacted by a breakdown in communications between circuit designers and PCB designers. Typically, the circuit designer has the [...]

Zuken & Würth Elektronik’s Collaborate to Provide Manufacture Rules-Driven Design Flow for CADSTAR

You might have seen the recent news about Zuken incorporating Würth Elektronik’s design for manufacturing rules into CADSTAR. Today I want to tell you a bit more about our collaboration with Würth. If you’re a PCB designer, you’ll know that you need to define the correct layer stackups, design rules and materials from the manufacturer. These [...]

Highlights of the 20th FED Conference: Design Rule Violations and PCI Express Design

Last week I was over in the beautiful city of Dresden, Germany; involved in Zuken’s participation at the FED conference – arguably the most significant PCB event in Germany during the year. Apart from our annual conferences in Ulm and Hannover of course Masoud Raeisi and I were very busy manning our own Zuken booth, supporting [...]

Why simulate PCBs at all? On- and off-piste gigabit signaling, simulation and modeling

This may seem a strange question for someone who’s made their living out of signal integrity for so long, but things have changed. There was a period in the 80s and 90s that I call the SI Deficit: the period when signal integrity issues took engineers by surprise and my specialty was even called “Black Magic”. The design landscape has changed radically since then – the main reason for this being standardization…

Ralf Bruening presenting at DNU conference

 The importance and recognition of Signal Integrity (SI), Power Integrity (PI) and Electromagnetic Compatibility (EMC) in PCB design continues to grow. Just a few weeks ago I had one busy week participating in various seminars on signal integrity and EMI simulation. The first saw me flying to Oslo in Norway for the DNU Spring [...]

Post image for How To Overcome Design Challenges Associated with Gigabit Signalling and the Ubiquitous LVDS in High-Speed PCB Design (Part 2)

In the first part  I covered just the bare essentials of why Low Voltage Differential Signalling (LVDS) is so popular.  So what’s important about how these high-speed differential signals are routed, and why? I’m going to focus here mainly on PCI Express, but the differential routing considerations apply equally to other LVDS technologies and to differential [...]