Ghosting of the template areas can be seen when dragging the cursor over its outline regardless of the visibility of the template layers. This will happen when the template layers are set as “Selectable layer” in the Layer Settings dialog. This is most common so the designer can select templates regardless of the active layer.
There is one thing that all design engineers will agree on: creating and gathering all the required data for PLM is error-prone and can be a royal pain. We all understand the value of releasing our design data to the corporate PLM system but our design process dictates multiple release points, and each one has a different purpose and data requirements.
I don’t think I’m generalizing when I say that designers working on complex high speed designs really don’t want to expend a lot of time and effort dealing with power integrity problems. And they especially don’t want to do it using tools that are detached from their design flow. In today’s complex PCBs, we’re talking advanced processors, complex FPGAs and superfast memories, which all share various voltage ranges.
Creating pin pairs in the Constraint Browser is fine for one or two nets at a time, but if you want to create pin pairs for a whole design, I recommend using an easy, single-step macro.
Pin pairs of nets other than power/ground nets can be created using a macro command. Pin pairs are needed in the Constraint Browser to obtain values such as “measured route length” and “Manhattan ratio.”
We live in a 3D world (OK, four if you count time). Over a decade ago 3D made a comeback in cinemas. And in the world of engineering, most mechanical design engineers have worked in 3D for decades. But it’s only relatively recently that electrical/electronic engineers have been able to fully join the 3D world – and wow, what a difference it’s made!