Meet Zuken in Israel at SemIsrael Expo 2018

If you follow technology trends, as I do, Israel’s huge start-up movement will be on your radar. 

The nation raises venture capital per capita at two-and-a-half times the rate of the US, and 30 times that of Europe, driving investment from across the globe to what’s been dubbed a “start-up nation”. Silicon Wadi (wadi meaning valley in Arabic) is Tel Aviv’s own Silicon Valley, with its cluster of high-tech industries built around military, start-up and VC communities.

I could go on, but I wanted to let you know that Zuken’s excited about what’s going in Israel in both start-up and more established companies, so we booked to be at SemIsrael Expo 2018, which brings together more than 1,000 Israeli semiconductor professionals from all fields and aspects of the semiconductor industry. We’ll be talking to companies in sectors such water, agricultural technology, drones, aerospace, medical, AI, machine learning, robotics, navigation, autonomous driving and more.

System-level Co-design Presentation

I’ll be giving a presentation on System-level Co-design in the Post Silicon Track at 12:20pm. Titled “Optimize Product Cost and Performance with System-level Co-design,” I’ll discuss:

  • How a new integrated 3D chip/package/board co-design environment makes it possible to holistically optimize the package, board and IC design to a greater degree than previously possible, by considering the system-level impact of each design decision.
  • How the new co-design approach enables designers to optimize routability via pin assignment and I/O placement to achieve minimum layer counts between chip, package and board.
  • Why the end result is higher performance and improved quality for smart systems, especially for MEMS and IoT applications.

The backdrop for my presentation is based on all the conversations I’ve been having with potential customers and users of Zuken’s advanced PCB design software.

We often speak about the increasing complexity of system on chips (SoCs) combined with a new generation of designs that combine multiple chips in a single package… and it is really creating new challenges in the design of packages, printed circuit boards (PCBs) and integrated circuits (ICs). The process typically involves three independent design processes – chip, package and PCB – carried out with point tools whose interface requires time-consuming manual processes that are error-prone and limit the potential for reuse.

If these challenges resonate with you, why not drop by my presentation or meet Zuken on Booth 7.

If you would like to talk further about this topic and you don’t plan to be at SemIsrael Expo 2018, you can get in touch at




Written by

Iyad Rayane focusing on the Co-design flow and Advanced Packaging solution with CR-8000. He has around 20 years of experience in the semiconductor field, spending 11 years as an Application Engineer at Mentor Graphics working on SoC design on advanced process nodes. Prior to that he worked as an EDA engineer at ST Microelectronics, developing RF and mixed signal design flows for large design houses. Iyad started his career in a startup in the Grenoble area specialized in Mems design and modeling. He is the author and co-author of numerous scientific publications presented at international conferences.

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