The proliferation of packaging designs that combine multiple chips into a single package is creating new challenges for package, printed circuit board (PCB) and integrated circuits (IC) designers. The common practice of designing the package, PCB and IC in st and- alone environment s requires time – consuming manual processes that are error-prone and limit the potential for design reuse. What is needed are 3D co-design tools that integrate planning and final design implementation at the system level for PCBs, ICs, packages and mechanical enclosures.
As IC packaging architecture advances, Zuken’s Design Force enables the designer to deal with the growing complexity in design space in handling high pin-counts, high density designs and the need to interface with multiple formats and flows. Parametric wizards are available to define and optimize pin maps.
Advanced packaging techniques such as system-in-package (SiP), fan-out wafer-level packaging (FOWLP), 3D die stacks, etc. have been around for over a decade, yet with any other EDA design tool, it is still a tedious, time consuming, and error-prone process to implement these designs. It seems surprising that there are so few reliable EDA solutions out there, but CR-8000 Design Force is definitely the tool to look to when tackling advanced package design! Take a look below and see why.
This new approach makes it much easier to, for example, swap pins between banks, to achieve better length control.
The 5 Top Design Issues: ECAD/MCAD Integration, PLM Integration, Data Management, Augmented Reality and PCB Package Co-Design
At this year’s annual conferences (ZIW) across Europe we brought together leading companies in their fields to discuss some of the design community’s the latest electrical and electronic design issues including: ECAD/MCAD integration, PLM integration, augmented reality and PCB package co-design.
A new generation of 3D multi-board product-level design tools manages multi-board placement in both 2D and 3D and enables co-design of the chip, package and board in a single environment. Multi-board design makes it possible to create and validate a design with any combination of system-on-chips (SoC), packages and PCBs as a complete system. Chip-package-board co-design enables designers to optimize routability via pin assignment, and I/O placement to minimize layer counts between the package, chip and board. The new design methodology makes it possible to deliver more functional, higher performing and less expensive products to market in less time.