Tagged: LVDS

Low Voltage Differential SignallingLVDS is a current looptechnology.  Is that a new idea?  Well, no. In fact around the time I started work the 20mA current loop was losing ground to RS232-C as a way to interface Teletypes to mainframes. It wasn’t that long ago: Woodstock and the Apollo 11 lunar landing were a whole two years in the past by then! The idea of a current loop is simple: The transmitter injects a current that passes through a resistor and because, by Ohm’s Law, V=IR, a voltage is developed across it.

The voltage is the signal at the receiver and that’s why LVDS inputs on FPGAs (field-programmable gate arrays) frequently feature an on-chip 100Ω differential termination (100Ω is the approximate differential impedance on the standard 50Ω (single-ended) impedance boards on which the application notes are based).

Flow

Why Simulate PCBs at All? On-and off-piste Gigabit Signaling, Simulation and Modeling

This may seem a strange question for someone who’s made their living out of signal integrity for so long, but things have changed. There was a period in the 80s and 90s that I call the SI Deficit: the period when signal integrity issues took engineers by surprise and my specialty was even called “Black Magic”. The design landscape has changed radically since then – the main reason for this being standardization…

Overcome Design Challenges

How To Overcome Design Challenges Associated with Gigabit Signalling and the Ubiquitous LVDS in High-Speed PCB Design (Part 1)

Over the next few weeks I’m going to talk to you about the high-speed design challenges associated with Low Voltage Differential Signalling (LVDS) and how to overcome them. Today I’ll start by mentioning some applications of LVDS and some basics about how it works. Next week I’ll share my knowledge on effective and efficient PCB routing of LVDS signals.