As we witness the birth of an era of connected devices with smart homes, connected cars and smart networked supply chains and factories, we might imagine that unexpected failures of electronic products would be a rarity. But all too often we hear about cellphones going up in flames, airbags that deploy on their own, or drones falling out of the sky. It is estimated that in the automotive industry alone, global warranties amount to as much as USD 40 billion per year.
Design reuse is getting more attention because much of the electronic content in electronics products has been commoditized, increasing amounts of functionality becoming consolidated in application processors or system-on-chips (SoCs) and their reference designs. Standardization of buses and protocols allow for even more reuse.
How Virtual Prototyping Tools Can Help Decide if Fan-out Wafer-level Packaging is Right For Your Product
Since it contributed to making the iPhone7 even thinner than its predecessors, fan-out wafer-level packaging (FO-WLP) technology has risen in the collective consciousness. By adopting FO-WLP on this scale, Apple sent out a signal that though highly novel, the technology had matured.
Defining initial hardware architecture requires many decisions, most of which impact a variety of different stakeholders and requirements – including multiple design tools – circuit design, PCB layout, mechanical design, spreadsheets, etc. that are used to track different elements of the design.
Hardware architecture design is becoming a competitive requirement as product complexity is on the rise and the room for error is shrinking.
We all know that manufacturing yields and costs are the driving force behind product development, rather than product quality.